Target triples

Amos Wenger: Oh, that reminds me. Did you, James, were you alive when- probably- people were passing around an ASCII art version of the Star Wars movie? Like you had to right size the notepad window and then you could hit page down, just like hold it. And then the repeat would make the- like a flip book, but in notepad for Windows 95.

All right. I'm gonna share my screen. Is everybody ready?

Amanda Majorowicz: No? Yes. Yeah.

Amos Wenger: You know, the fun thing is that every time I move my lips, it hurts because the interior of my lips rubs against very sharp metal bits. And so I've started correcting by just mumbling instead of pronouncing words because it hurts less. I'm optimizing for least pain. When we record the podcast, or when I record a video, I need to consciously reverse that and make it hurt so that it sounds good.

It's fun. I love it.

James Munns: I did three or four years of braces too. So, I mean, I have not recently felt your pain, but I've absolutely felt your pain in the past.

To be fair, I didn't have a podcast when I was in sixth grade, so...

Amos Wenger: Maybe you should have, James.

James Munns: That was a blessing, I guess. I guess a blessing for both me and the world, I think, but...

Amanda Majorowicz: What would it have been about in sixth grade?

James Munns: I don't know, what was I into- probably video games or Pokemon at that point.

Amanda Majorowicz: Oh yeah, mine would have probably been like Spyro and Crash Bandicoot.

Amos Wenger: Spyro? Sign me up!

James Munns: Mine would have been like, N64 games and Pokemon and...

Anime, maybe? Like Dragon Ball Z and stuff like that?

Target triples - Lies, damned lies, and target triples

Amos Wenger: Okay. Well, unfortunately, today's podcast is about target triples. I have a subtitle here, because I'm contractually obligated to come up with subtitles for this podcast, against my will. And the subtitle is "Lies, damned lies, and target triples," which repeats the title. I don't know if that's legal. I have no idea.

Amanda Majorowicz: I accept it, it's fine.

Amos Wenger: Thanks, Amanda. What's a target? It's a machine that code can run on. James, you have 15 seconds to disagree.

James Munns: It's more specific than that because one machine can have different operating systems, ABIs, configurations...

Amos Wenger: Yeah, we're getting to that as you can imagine.

. It's called a target triple, which has the prefix 'tri', so you would expect it to have three components. If you do check the target triple on the machine that I'm recording this from, which is a Mac Studio- If you do rustc -vV, like lowercase vV, which stands for 'verbose version', then you get the full version of rustc, which includes 1.82.0. That's the current stable. You get the commit hash, the commit date, and the host shows aarch64-apple-darwin.

So we're going to get into what each of those components mean,

What does each component mean

Amos Wenger: So in aarch64-apple-darwin: aarch64 is the architecture. In that case, it means 64 bit ARM- we'll get into ARM naming conventions. I have 45 slides. Get ready.

The second segment in this case is the vendor. It's Apple. And the last segment in this case is the operating system, which is Darwin. Funny, I don't remember installing Darwin on this computer. Darwin is the name that Steve Jobs came up with when he was interim CEO of Apple in 1999 because, and I quote, "It's about evolution." I'm very glad that I found this slide. Again, if you're not looking at slides you're missing out, you can go to sdr-podcast.com to find the episode and find the slides for this. It's an article from Wired that says "Apple Opens OS Code."

James Munns: I'd like to interject for a second, what you've been referring to as Mac OSX is actually Mac OSX running on the Darwin kernel, or as I like to call it, Mac OSX plus Darwin.

Amos Wenger: Yeah, well-

James Munns: Can I be an Apple neckbeard?

Amos Wenger: You can, you can. I started looking into this, there's the whole history, like the lineage of like BSD and NeXTSTEP and OpenStep and Darwin was supposed to be this open thing where like, they said, " We believe that putting it out there will help us make it the best technology collectively we know how to make."

So it was Apple saying, "Oh, we're open now. Everybody can come contribute." Nowadays it's like, yeah, they have an ftp server essentially that are legally required to have where they dump source code and you can look at it, I guess.

James Munns: I'm just here so I won't get fined.

Amos Wenger: That's exactly it. So, uh, there's a whole history there. Which would make a fascinating other episode because this is only slide eight, so I had to cut the research short. People will write emails about this. It is fine I accept the responsibility on behalf of our producer Amanda who will actually have to look at those.

So, there's other targets that look like it. Mine is aarch64-apple-darwin, but there's also x86_64-apple-darwin. I'm gonna be saying a lot of punctuation out loud so get used to it. Those were Intel Macs. Those we had before the Apple silicon Macs. So Apple M1, M2, M3, M4. Those are Apple silicon. They're aarch64. But before that we had Intel Macs. I still have one of them and you can recognize them very easily. The fan makes a noise when they turn on. Yes.

James Munns: They are loud and hot.

Amos Wenger: Yes. Like me!

James Munns: Yeah, I was gonna say I was looking around. I have one in my house, but not in this room.

Before Intel Macs, we had PowerPC Macs

Amos Wenger: Before Intel Macs, we had PowerPC Macs. James just is making big eyes at my slide with a picture of-

James Munns: Hell yeah, 68k Macs.

Amos Wenger: A Mac Quadra 605. I don't actually know...

James Munns: No. Oh, sorry. No, this is powerpc. 68k is before that.

Amos Wenger: Yeah, yeah, yeah. Oh, we'll get to 68k, don't you worry. Siri just woke up for some reason. I talked about the Quadra 605 and Siri was like, "I will help."

James Munns: Friend! Friend!

Amos Wenger: rustc, the Rust compiler, has a bunch of PowerPC targets. There's three levels of support, which we'll get into roughly what they mean. There's three power PC tier two targets in Rust: powerpc -unknown-linux-gnu, powerpc64 - the same thing, and powerpc64le for little endian dash the same thing.

What devices are still PowerPC today? Because those are actually maintained. I was trying to find the answer and I tweeted about it. You might've seen it and answered something useful. Why is PowerPC still relevant today?

A couple of answers: as recently as the PS3, the Sony PlayStation 3 console, they were using PowerPC based processors on there. PS4 and PS5 changed.

James Munns: That was the Cell processor. Was the Cell PowerPC based? Cause Cell was its own weird architecture that only the PS3 used.

Amos Wenger: I have speaker notes, I come prepared this time. The PS3 uses the Cell microprocessor, which is made up of one 3.2 GHz PowerPC-based power processing element and six accessible synergistic processing elements, SPEs. So yes, it is- at least part of it is PowerPC based.

Apple used to make servers

Amos Wenger: And then also, Apple used to make servers, remember that? They made the XServe G5, I think that's the last one they released? We have a picture of it here with typical Apple marketing, which means there's nice shadows and like little reflections on the image. It says, "More power, less energy, introducing the fastest, most energy efficient Xserve ever." It has several configurations: that come in single processor, dual processor, cluster node. And they're like roughly two- between two and 2.3 gigahertz per processor?

James Munns: Core, probably?

Amos Wenger: Yeah... uses ECC memory with a 16 gigabytes maximum. I don't have the year here, which is a shame, but it is a server from another era for sure. But it was PowerPC. It still is. Some people are still running it, I imagine.

IBM is probably the reason that PowerPC is still a tier two target in rustc because they actually forked PowerPC in the nineties. I was born, butterfly flapped its wing, IBM forks PowerPC into an architecture called POWER, which is not at all confusing, which is actually an acronym. It means "performance optimization with enhanced RISC." And by "enhanced RISC," they mean an instruction set that actually has a hundred plus instructions and that supposedly has fixed width encoding, which is supposed to be a RISC thing, but actually they do have prefix instruction because they have a lot of SIMD stuff, like single instruction, multiple data.

So, POWER is still used today, as sort of a middle ground between like full on mainframe and like smaller things. Some people still have POWER hardware.

James Munns: Do you know where else they are?

Amos Wenger: Banking?

James Munns: A lot of radiation hardened processors for satellites and Mars rovers and things like that are on CPUs like the RAD750 which is a larger radiation resistant power pc architecture designed to be resistant to the radiation you get in space or when there's not an atmosphere or magnetosphere.

Amos Wenger: That's true!

James Munns: They run slow and but they are generally qualified to be rad resistant. They get used in either embedded systems including goofy rad-hardened embedded systems in space as well, still, to this day.

Amos Wenger: Yeah, it's fun cause like, designing for satellites is completely different from designing for Earth, cause... yeah, you have to worry about these.

Raptor Computing System came up when I asked people about PowerPC on social media. They make workstations you can buy, starting at $9,977, so I ordered a couple just to get a feel for them, y'know?

James Munns: Business expense.

Amos Wenger: Can we expense those, Amanda? Yes? Yeah, no, okay, no, sorry, I'll just return them, it's fine.

But they make new POWER9 workstations, even though IBM's already doing POWER10, because POWER9 was the last one you could still, like, all the bits were free, so Power10 is still up in the air for licensing reasons.

Debian Popularity Contest

Amos Wenger: There is Debian, the Debian Linux distribution makes a survey, a Popularity Contest, they call it, of which architecture are you running right now? And so we are looking, and you should be too, go to sdr-podcast.com/episodes and find this episode. you can look at the slide that says "Number of submissions per architecture," and we can see, because this ranges from 2004 to 2024, so we got 20 years worth of like personal computing history in there and servers and whatnot. You can see the rise of 64 bit computing starting from zero in 2004, going all the way to... well, it's just powers of twos was like 262,000 respondents. And then you can see the slow decline of 32 bit, in this case the i386 architecture.

And you can see also the rise of ARM64. And then you cannot at all see PowerPC on there The total responses for the last survey were 112 out of like a lot.

James Munns: Yeah.

Amos Wenger: I also got an actual response from someone who works on the Rust compiler: why is PowerPC 64 tier 2? The simple answer is because there are people from IBM that care about fixing the target and therefore it gets to be tier 2. Tier 2 requirements essentially boil down to: can we legally and without too much pain compile core and std in our CI? And two, are there people who we can call when it stops working?

So that's all it takes to be a tier two target.

James Munns: Yeah, there's two different flavors of tier two. One is basically tier two hosted, which means that they can compile and run cargo and rustc on it. And then there's ones particularly for the embedded system. So like all the embedded systems targets- -are all or mostly tier two because they are non hosted ones.

Cause you can't run cargo on a microcontroller, but you can compile to the microcontroller with cargo.

Amos Wenger: Yes. There was an effort in July of 2023 to kind of sort out tier two targets because there were too many of them. And some of them didn't have documented maintainers. So it was like: Oh, this one broke. Who do we call? We don't even know. It's not really clear. People change jobs. they started documenting that better.

The thing with tier two targets is that they can be either promoted to tier one or they can be demoted to tier three. So there's a lot of different quality of targets in there.

If we're looking at those PowerPC targets again, you may notice that for target triples, they have four components. There's PowerPC, which is the arch, there's unknown, which is the vendor, Linux is the operating system, and then gnu is the ABI.

James Munns: Did you ever read the Hitchhiker's Guide to the Galaxies books?

Amos Wenger: I pretended I did, but I never actually.

James Munns: That's fair. So they were writing the books and they originally built it as the Hitchhiker's Guide to the Galaxy Trilogy. And then they made a fourth book. And on the title, they said, "The fourth entry in the increasingly less accurately named Hitchhiker's Guide to the Galaxy Trilogy" or something like that. So this is- -exactly that experience again.

Muzzle? Muscle? musl

Amos Wenger: This is exactly it. The ones we're looking at ends with gnu for glibc, the gnu C library, but there's also musl variants, which I say 'muzzle,' some people say 'muscle,' but it's actually spelled M U S L And interestingly, the gnu target for x86_64-unknown-linux-gnu -that's the podcast you chose to listen, don't put the blame on us- is tier 1, but the musl one is tier 2.

And in most people's heads, the musl target is there to serve as a fallback for when you download a binary that was linked against the glibc but somehow your Linux distribution has a different version of glibc than their Linux distribution so it doesn't actually run and so you just get the musl one instead which is statically linked we're looking at the slide that shows that the musl build of cargo dist for example is statically linked it doesn't have any dependencies so it should be able to run on any Linux system out there that supports LSB I guess, but that's been a thing forever.

Where was I going with this? Right. That people assume that the musl target is statically linked, but actually it shouldn't be. And in 2021, the Rust compiler team accepted a major change that says: Oh, right now we default musl to be statically linked, but that was a mistake. And it turns out that there's people who actually care about dynamically linking against musl. And those people are the people who develop musl and musl based distributions like Alpine and Void Linux and you can do that on Gentoo as well, I believe.

And so actually we should change the default which is going to break everyone else's assumptions of what the musl target is for. I have like a zoomed in part of the slide that just shows how you are now, after that change, supposed to actually enable static linking and it's -Ctarget-feature=+crt-static. And the way you're supposed to disable it is to do =-crt-static or minus crt-static, I guess, in that sense. Which is the most confusing naming scheme ever and I hate it personally.

But yeah, the change was approved in 2021.what happened since? it's really hard to actually make that change happen without making everyone instantly angry. And so... I think there's other like intermediate changes that they want to do first, but... Yeah. The real life is messy.

Halfway through slides, so many targets

Amos Wenger: We're roughly halfway through my slides I would say. We're looking now at i686-pc-windows-gnu. That's kind of a weird change. On the Debian graph earlier we saw i386 as a placeholder for 32-bit processors, and this is chosen to be i686. Why?

Because if you look at the history of Intel processors, you start in 1971 with the 4004, and then you have the 8008 in '72. Then you have the 8080, I'm going to call it, the uh, 8 bit successor, Then you have the 8086, the first in the x86 series, like the 186, if we had a 186, and then you have the 286 in '82, which was 16 bit, and then the 386, which started the era of 32 bit processing.

So that's why Debian calls it 386. It's because it is the first 32 bit processor in the Intel line, at least, I don't know about any other vendors. Then you have the 486, then you have the 586, which didn't actually get called 586, but it is like the Pentium. Then the 686 is the Pentium Pro and then later the Pentium 2 and Pentium 3 also belong to that.

And so actually in the Rust world, when you're looking at an i686 target, what you're talking about is: it has streaming SIMD extensions. It has SSE support.

So there's also i586 targets, which I don't know who uses, but it's 32 bit Linux without SSE, without those streaming SIMD extensions.

James Munns: Yeah, I'm trying to think of another analog of this. It's sort of like, I know on Mac, it's basically setting, like, your enablement list of that of, like: ah, this is SDK version whatever and above. Where, like, 386 means you only support the subset of features that that does, where, like, 586 or 686 gets you a larger superset.

Or, it's also the reason why a lot of people, when they're compiling for high performance stuff, they do...

like native or whatever because your, processor is probably like it's got a whole suite of things that the Rust compiler is not going to turn on because you told it like pretend that I'm compiling for a machine from 2011 and not your wonderful machine in 2024 or whatever.

Amos Wenger: But then if you do that- like you built something with -march=native and -mtune=native and whatnot - and then you deploy it to like a Hetzner server you got on the auction. And then it actually is a processor from like 2011 Then you might notice SIGILL, I think, just illegal instruction, which is like: I don't have this extension, I don't have SSE 4.2, so, no.

So that's why this target is there,

James Munns: There's like two really enthusiastic retro computer folks who are just very excited that they can run their- I think you can run Rust on like Windows 95 or Windows 98 and I think that's what that 586 target is for is for running it on like, Windows 98.

Amos Wenger: Speaking of-

James Munns: Oh cool

Just use the native toolchain, okay?

Amos Wenger: If you're making Windows binaries, I beg of you, please use the dash msvc ABI, because that's what you should do on Windows, because it's like, not using Xcode. It's not using Clang to build binaries for macOS, you could, but why would you?

Just use the native toolchain, okay? Make me- make me happy. But if you don't want to, if you want to make me sad, there's a gnu ABI thing, which then doesn't correspond really to glibc. In this case, like it means you're using MinGW or MinGW-w64, which also supports 32 bit and 64 bit. And so we have those windows-gnu targets, which honestly is never what you want, unless you know already, and then don't listen to me.

But then also usually the Windows targets are like x86_64-pc-windows-gnu or msvc, but actually in the target list for rustc, I find UWP, which is Universal Windows Platform, which doesn't have all the traditional Win32 stuff. all the calls to like open files, start processes, wait on objects and everything, none of that.

Now everything is through WinRT, the new system. I don't know what's the current status of UWP to be completely honest, but we have a target for that! There's a specific target for Windows 7 as well, which I believe was dropped from the rest, but there's still a target for it. I don't know if it works. No idea. Didn't even try.

ARM naming conventions

Amos Wenger: Let's now talk about the way ARM naming conventions work, which is they don't.

We have already seen aarch64. We have Apple Darwin. That's again, all the Apple silicon processors. We have aarch64 unknown Linux gnu, which you would get if you install Asahi Linux, for example, on your M1 MacBook or something. But also, some laptops that are made specifically to run Linux on ARM64, like the Pinebook pro, the HP EliteBook and everything. We have aarch64 PC Windows MSVC because Microsoft's also been trying to introduce ARM 64 laptops. The Surface Pro X is an ARM 64 machine. They introduced support in like Windows 10 and they improved it in Windows 11 'cause it lacked x86_64 bit emulation. So there was this weird moment where you could have ARM 64 and it could emulate 32 bit x86, but not 64 bit x86. Yeah. Cause it's all emulation now.

But if we look at ARM outside of desktop and laptop computers, then that's- count with me, all right? So arm just means ARM version six, and then you have armv7, which means ARM version seven. And then you have aarch64, which means ARM version eight. Of course. James: disagree. .

James Munns: What? No, yeah, there's even more. Even in supported in Rust there's armv5te, there's armv4. If you wanna run on like... what is it, like a Nintendo 3DS or something? Is still using like armv4 or something? Oh, we'll get there? Okay, cool.

Amos Wenger: We'll get there. Don't worry.

James Munns: We're starting to get into like- I get into a lot of this with embedded stuff.

Amos Wenger: This is not the single, the singular ARM slide. There's also armv7a, armv7r, 'cause there's different profiles. I don't know what those mean. There's-

James Munns: Oh, okay! So real quick: ARM has three major classes of processors now. They've got application processors, which are 'a': those are all of your mobile phones, your desktops and things like that. There's Cortex-R, which are the real time processors, which are used in, like, vehicles and real time systems. And then you have the microcontroller profile, which is what, whenever I'm talking about developing for, like, USB devices and whatever, I'm talking about the M profile. So ARM has three profiles: A, R, and M.

And they are specified in the ARM Reference Manual: A, R, M-

Amos Wenger: Mind blown.

James Munns: and the compact architecture used so when you want to use 16 bit instructions instead of 32 or 64 on these target is thumb! That's the tiny version of ARM.

Amos Wenger: That's my next slide! That's thumb mode. Yeah. James, I made this slide deck for you.

James Munns: I've had to go look up the arm arm before!

ARM's Thumb Mode

Amos Wenger: Yeah, so Thumb Mode, I discovered, I thought it was like, "What the frick is that? Is it the different class of devices?" No, it's just the mode, so you can switch between like Thumb Mode and regular mode, right?

James Munns: Well...

Amos Wenger: Or just the startup?

James Munns: A class profiles can do either. So before armv8, you could switch. They actually had an instruction that would switch the CPU from interpreting large ARM instructions to small thumb instructions. So you could swap back and forth on a Cortex-A if you wanted compact instruction encoding.

That's actually the feature of the Cortex-M devices though, is they only support thumb instructions. They cannot support ARM instructions. So they actually, you could run the same instructions on your mobile phone and your microcontroller, as long as you only use the thumb subset, which are the like sort of compressed instruction mode.

Amos Wenger: Yeah. The arm mode instructions are 32 bits and in Thumb Mode they're 16 bits, so the, the whole program ends up-

James Munns: Except for when they aren't, but yeah.

Amos Wenger: I assume there's prefixed instructions as well.

James Munns: Yeah, there are more. RISC instruction sets are not very RISC anymore.

Amos Wenger: Yeah. So in terms of how they show up, I'm showing just the arch prefix of the relevant targets. We have thumb v6m, thumb v7m, thumb v7em, I don't know what the e's doing there.

James Munns: So V six- V six is Cortex M zero, cortex M zero plus. V seven is Cortex M three. Cortex V seven EM is Cortex M four, M seven and thumb V eight M are all the two digits, like Cortex 20 something Cortex 30 something processors.

Amos Wenger: That's the first time I've seen a period in any of these.

James Munns: They got weird with the naming on this-

Amos Wenger: Thumb v8m dot base?

James Munns: It broke all of our tooling when they did that, like both in rustc and in the embedded Rust world. There was like a couple of weeks where we just had to rewrite-

Amos Wenger: I mean, it's not technically forbidden. There's no rules for target triples. They're not triples. They're not targets. Of course you can put dots in there, who cares, like... but there was an understanding, like, before that, all of them are, like, A to Z and 0 to 9, and that's it. Yeah.

Speaking of saving memory, there's a very interesting arm64_32-apple-watchos. And I learned about this one. It's arm64 but 32 bit pointers, and it's used for the Apple Watch because they have lots of code in some applications. 64 bit pointers actually use up a bunch of memory, just the whole, the address of other things. And there's not that much memory on the Apple Watch anyway.

But you still want ARM64 because like, I guess that's what you're manufacturing, and also you get more efficient instructions for like SIMD and stuff, cause you do signal processing on there, you do like voice recognition, you do a lot of things. So you get the best of both worlds. You get 32 bit pointers on ARM64.

James Munns: There's something similar on a Raspberry Pi, where they have a 64 bit kernel, but user space is 32 bit, and they've-

Amos Wenger: That's my next slide, James! You're so predictable! It's aarch64_be for big endian -unknown-linux-gnu_ilp32. You didn't have a stroke. That is the entire name. I had to shrink the font just so it fits in the slide.

James Munns: I guess it's still four pieces,

Amos Wenger: It is four pieces but there's underscores. Yeah. ILP32 is "Integer Long and Pointer as 32 bits." And it's the exact same idea, but now instead of being part of the architecture, like arm64_32 instead of being at the beginning of the triple, it's just at the end with the ABI like gnu_ilp32. But yes, it's the exact same idea. It just takes too much memory to have 64 bit pointers. We probably don't have more than four giga bytes of RAM anyway, so let's just do 32 bit pointers.

Retro computing target- 68000

Amos Wenger: We are finally getting to the part of the episode that's about more or less 68000.it used to be used everywhere. Pretty much.

James Munns: Very popular retro computing target, yeah.

Amos Wenger: The Mega Drive was a 68000. I had a graphing calculator, the TI-89, and some other models of TI calculators were 68000. That's how I first learned about it as a kid. I printed the entire manual of like 68000 assembler just to learn it. It didn't go anywhere. I was too young. I was like 12. I couldn't follow, but I could play Mario on it. That was fun.

This has been a long recording. We're almost done. Don't worry.

Next up we have, uh, the China slide. There's an architecture called loongarch64. I'm not sure that's how you say it.

Amanda Majorowicz: It's not loooooong arch??

Amos Wenger: It's not looong. At first I was like, "Oh, they made aarch64 longer!"

Amanda Majorowicz: Darn it.

James Munns: It's actually a Chinese word, I don't know if it's loong, but it's definitely like not just loooong arch.

Amos Wenger: It started in 2001 as Godson, and it was renamed in 2010 to Loongson. at first I was like, "Oh, cool, a new architecture!" And then I was like... "in March 2023, the United States Department of Commerce added Loongson to the Bureau of Industry and Security's entity list for acquisition of American technology to support the People's Liberation Army."

And then you're like, "Oh! I accidentally opened the Cold War between China and the U. S. it's pretty much like China being progressively cut off from using American IP.

So they had the contingency plan like: oh, this is actually our own architecture. You cannot prevent us from doing that. It is a spiritual successor to like MIPS and RISC V- that they fully own so they can just do whatever.

In November 2023 they debuted the 3a6000 processor fabricated using a 14 nanometer or 12 nanometer process. I love when Wikipedia is like: we don't- we're not really sure. We didn't send someone to China to check,

a lot of the stuff that I've seen is more focused on RISC-V because RISC-V also has 64 bit modes and it seems like there's a lot more interest in around that, but maybe this is more targeted at the classic x86 domain where RISC-V is like a different take on ARM and things like that. So the Loongson thing it was a research project. It was like part of China's policy "Made in China 2025," and it was this long plan of like: we're gonna stop just manufacturing other people's design, we're gonna have our own designs like the whole thing is gonna be like designed and manufactured and assembled and everything in China and so that was their thing for processors.

Fuchsia (and its pronunciation)

Amos Wenger: Next up we have seen target triples with _3 _components, as triple would suggest, or 4 components-

James Munns: I'm very interested to see how you pronounce this.

Amos Wenger: But we also have ones with 2 components.

James Munns: Especially being in Germany.

Amos Wenger: You say it. Why should I take the risks, James. It's fuchsia.

James Munns: Okay. In American English, I would say "fyoo-shuh"

Amos Wenger: "Fyoo-shuh".

James Munns: In German, I'd probably say "fooks-i-a".

Amos Wenger: Fuchsia, sure. Well, I'm going to spell it out. It's f u- f u c- this isn't going where you think it is: f u c h s i a. It's Google's permanently in a state of research operating system.

James Munns: It is in deployment. It's in quite a few devices,

Amos Wenger: It is. In, some Google Nest Hub devices, according to my research.

James Munns: That they've talked about publicly.

Amos Wenger: Yeah, yeah, that's true. They could be running it more internally. And I guess, if you're big enough, it's always good to have your own everything, right? Including your own operating system.

But yeah, very annoyingly their targets are only two components. They have like aarch64-fuchsia. I'm just going to say it the French way because that's who I am. And underscore 64-fuchsia... I- - I have nothing more to say about this.

Other arches

Amos Wenger: Next up! We have other arches, when you have three components, you're like: which one did they omit? Did they omit the operating system? Did they omit the ABI?

. So UEFI is the thing that like, has replaced the BIOS, I would say. The thing when your computer starts up, it's running in UEFI mode, you can adjust the speed of your fans and everything, you can build for that. You can write Rust code that will run in that mode.

There's Redox, which is the kernel written in Rust. There's aarch64-nintendo-switch-freestanding, so that's not an ABI, that's the lack of one. It's like, you don't have a libc, you have nothing, good luck.

James Munns: Yeah.

Amos Wenger: It's fun that there's a Nintendo Switch target.

James Munns: It's basically none. I don't know why they went with freestanding instead of none, but I'm sure they have a good reason.

Amos Wenger: I don't know. There's another Nintendo one. It's armv6k-nintendo-3ds and then no ABI. In terms of game consoles, there's also armv7-sony-vita-newlibeabihf. We'll get into what that means right now, actually, because

Hard float, Old ABI and the AAPCS

Amos Wenger: if you look at the ARM target, so that would be armv6, right? You have arm-unknown-linux-gnueabi. And then the same thing. But E A B I H F, and the H F stands for: James?

James Munns: Hard float.

Amos Wenger: Hard float, which means that the one that doesn't have hard float has software-emulated floating points. So whenever you use F32, actually doing all the multiplications and divisions and everything, like, in software instead of just using a CPU instruction.

James Munns: That's true, but the reason why it shows up in the ABI is because those processors have floating point registers. So like you normally have integer registers that your processor uses. You have an additional set of floating point registers on there, which you don't necessarily have to use for floating point, but the ABI changes because when you pass, for example, a float by value in a function call, on a soft float target, you would put that in normal registers.

If you had a hard float target, you would put that in there. So if you had a function that took a U32 and an F32, the ABI on the soft float target would be to put those in regular registers. On the hard float target, it would be to put the integer in the regular registers and the float in the floating point registers.

So that's why it's in the ABI field, because you're right: you have to also do all the software-emulated floating point, but the reason that it shows up in the ABI field is because you get basically a whole bonus set of registers available there.

Amos Wenger: Right, I'm tempted to ask why even have floating point specific registers as opposed to just having general purpose. I'm imagining it's like the simplicity of the design

James Munns: Yeah, I don't know. All of the floating point instructions will draw from the floating point registers and they also have some capabilities of like... how normally if you have 32 bit registers and you have a 64 bit value, you put them in two neighboring registers and floats are the same way for F32 and F64s.

Why? I don't know. Probably because it's easier on the silicon... but yeah, I don't know.

Amos Wenger: Yeah, cause like on ARM64, if you've reinterpret the bits of a float as an integer, that's a no op pretty much. It's like, it's just a type change from your compiler's perspective?

James Munns: I think it copies it from the float registers to the... and the integer registers.

Amos Wenger: Yeah. On those processors, it would have to copy it to a different register.

James Munns: It's probably lazy, like until you actually do something integer-y with it-

Amos Wenger: Probably.

James Munns: - it does nothing. But if you want to do integer ops on it, I think you have to move it from the float. Because the instruction encoding, you only have a couple bits to describe what register you're talking about.

So if you had just more registers, you'd have to have more bits to encode which register you're sourcing from.

Amos Wenger: That makes sense. So that's the hard float part, the hf part of those targets. And then there's also E ABI. I was curious what the E stands for. It stands for Embedded ABI. It was the successor of O ABI, which has been retronamed the Old ABI? Surely when they made it, they didn't call it Old ABI.

What happened there?

James Munns: It's been gone for more than a decade, but yeah. This is specified in the AAPCS, which is the ARM Architecture Procedure Call Standard 32.

Amos Wenger: And my next episode, we'll be going through every page of the AAPCS and recording for 17 hours.

James Munns: It's a good doc. It's actually on GitHub as a Markdown doc. It's good.

Amos Wenger: I'm sure it is.

nvptx64-nvidia-cuda

Amos Wenger: next up is nvptx64-nvidia-cuda. I don't know if that's still a real target. For a while there, it was something you could build to, so that you could run code directly on your graphics card. But the thing is GPUs don't really look like CPUs. They have assembly, they have instructions, they have pipelines, but... they have like way too many registers, they do everything in parallel... it's complicated.

I know there's definitely ways to write Rust code for the GPU, but I don't think it's through that target anymore. I might be mistaken. James, you're nodding.

James Munns: I have no idea. I know that like shader compilation is a thing and I know some folks like the Rust folks and stuff were working on that but that's totally out of my wheelhouse.

Amos Wenger: I don't have the notes here, but readme for a project related to the nvptx64 target says: we got it working one day and then three days later they added support for 128 bit wide integers and that broke the targets, but unfortunately they did not release a nightly rustc version between those two dates. So there is actually zero versions of rustc that actually still builds this target. I don't know if that's still accurate, but I thought that was very funny.

We have s390x-unknown-linux-gnu. That's IBM System/390. I know very little about this because it's mainframe, and I've never worked with mainframes. But it's a computer the size of a room? Not anymore, I guess. It's just the size of a big, like... where do you put your clothes? A big closet, right? Yeah, very pricey. Yeah, I ordered a couple as well. And, uh, you can run System Z, which is IBM's operating system for mainframes, or you can run Linux on there. And so that's what this target is for.

We have the WebAssembly targets. The first one we saw was wasm32-unknown-unknown, uh, which has nothing. It has no operating system. It has no ABI. It has nothing. It can compute things. And that's all it can do.

James Munns: This is our none or freestanding target, basically.

Amos Wenger: Yeah. So if you want to generate random numbers, you have no random number source. So good luck. If you want to time something, you have no timers, you have nothing. So what you do is because you're probably calling this from JavaScript. You go back and forth between your JavaScript world and the WebAssembly world, which results in your WebAssembly powered thing probably not being any faster because you're doing all those translations. You're crossing the bridge all the time.

And so they made a different thing called wasm32-wasi. We have the return of triplets with only two components. And that one is also versioned. I did not include all the other ones because I predicted we would be tired by this point, but there's preview one preview two there's there's so many different things happening but they are adding apis for file io network io, timers, random number generation, all you would expect from like a kernel. they're adding syscalls essentially to WebAssembly so that you can actually do useful things with them.

WatchOS targets

Amos Wenger: We are nearing the end of the presentation. I want to reassure you. we've seen arm64_32-apple-watchos. There's a couple other WatchOS targets. There's aarch64-apple-watchos, which is what I have on my wrist, Which you cannot see. Even if you go to sdr-podcast.com/episodes, There's aarch64-apple-watchos- sim, which is what you get if you run the WatchOS simulator on an Apple silicon Mac. And then there's x86_64-apple-watchos-sim, which is what you get if you run the WatchOS simulator on an Intel Mac, I would imagine. I didn't check, but that's the only thing that makes sense to me.

Final target- MacABI

Amos Wenger: And then we have our final target, which I love very much, which is x86_64-apple-ios-macabi. James, do you have any idea what that is?

James Munns: I have no idea what

Amos Wenger: not Maccabi, I said it wrong on purpose to be funny. It's MacABI. Does that help a little bit?

James Munns: I can imagine, but I have no idea why they have, like, seven flavors of ABI's that they'd like to play with, just to make programmers sad.

Amos Wenger: No, it's to run iPad apps on MacOS.

James Munns: Okay.

Amos Wenger: Remember a while ago when Twitter made a new app back when it was still called Twitter and they were like, "We have a desktop app now!" And it wasn't like a Mac app. It was the iPad app And that's a technology Apple calls Catalyst. And that's the target for that.

James Munns: Gotcha.

Amos Wenger: we are finally done. Thank you for following me on this journey through Target Triples. We didn't even talk about some of the funny ones.

There's QNX in there somewhere, there's AIX, there's A lot of things happened. It's fascinating to me because it's history because you look at them and you're like, "Oh, that's right! We used to do that. And now we don't. And it's better now." I want aarch64 all the things now. I don't, you know...

James Munns: Every target triple made sense when it was written, the problem is that it's been written over 40 years, which means the things that made sense then, no longer make sense.

Amos Wenger: Because we talked about Thumb Mode and it reminded me of the fact that even today my desktop computer, when it wakes up, is in 16 bit mode and then it needs to switch to 32 bit mode and then to 64 bit mode and then maybe it's awake.

James Munns: ARM's gone the opposite way. Newer versions of aarch64 can't run thumb instructions anymore to simplify the core. They can only support ARM instructions. So Apple's actually going the opposite way in that they're removing legacy support because otherwisethe cool thing about ARM is it's kind of like the 386, 586, 686 stuff. you can run Arm V four on V five or six or seven or eight, and I think V eight is the first one that really broke something, in that it just said you can't run thumb instructions anymore.

Amos Wenger: So that's target triples for you. They're not triples. Don't let them tell you that. This is a good conclusion, right? This is what podcasts are about? All right. Bye everyone.